Thanks a-lot @lagapidis its very informative , i am going through the links you have pointed . If anything i will get back .
I found some basic information to understand MAC-MII-PHY at https://resources.pcb.cadence.com/blog/2019-mii-and-rmii-routing-guidelines-for-ethernet
Hi Laz,
Few more questions i am trying to find out is " Q1 . Along with ASICS why we need a separate external CPU ?" .
My current understanding is :
ASIC is a piece of silicon which is uses multiple engines(programmable like UADP or non-programmable) with a fixed pipeline manner . If its non-programmable we can add a FPGA and programme it as per our requirement . Its function is to forward packets based on engines on the defined pipe line to other ports . Most of the things like packet processing ASIC has done what is the requirement of another component cpu in network hardware ? can you please give a example of packets forwarding path .
Q2 : Is ASIC works on dataplane and CPU works on control plane ?
Q3: what is term Fabric ?